From Newsgroup: comp.arch


Does any one have {data on} or a pointer to {literature on} ST
to LD forwarding occurrences that isolate any of the following
patterns::

ST Rs,[Rbase+smallDisp]
...
LD Rl,[Rbase+smallDisp]

where Rbase is the 5-bit register specifier (not value), and:
ST-Rbase is the same as LD-Rbase AND (of course)
ST-smallDisp == LD-smallDISP,

Where ST-Rbase is different than LD-Rbase but forwarding
happens none-the-less,

Where ST-Rbase is the same as LD-Rbase, but Rbase has been
modified between ST and LD but forwarding happens none-the-
less,

ST Rs,[Rbase+Rindex<<scale+smallDisp]
...
LD Rl,[Rbase+Rindex<<scale+smallDisp]

Where ST-Rbase is the same as LD-Rbase but
St-Rindex is different than LD-Rindex but
forwarding happens none-the-less,

Where ST-Rbase is the same as LD-Rbase but Rbase has been
modified between ST and LD but forwarding happens none-the-
less,

Where ST-Rindex is the same as LD-Rindex but Rindex has been
modified between ST and LD but forwarding happens none-the-
less,

???

Thanks
Mitch
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From Newsgroup: comp.arch

MitchAlsup <user5857@newsgrouper.org.invalid> schrieb:

Does any one have {data on} or a pointer to {literature on} ST
to LD forwarding occurrences that isolate any of the following
patterns::

ST Rs,[Rbase+smallDisp]
...
LD Rl,[Rbase+smallDisp]

where Rbase is the 5-bit register specifier (not value), and:
ST-Rbase is the same as LD-Rbase AND (of course)
ST-smallDisp == LD-smallDISP,

Where ST-Rbase is different than LD-Rbase but forwarding
happens none-the-less,

Where ST-Rbase is the same as LD-Rbase, but Rbase has been
modified between ST and LD but forwarding happens none-the-
less,

ST Rs,[Rbase+Rindex<<scale+smallDisp]
...
LD Rl,[Rbase+Rindex<<scale+smallDisp]

Where ST-Rbase is the same as LD-Rbase but
St-Rindex is different than LD-Rindex but
forwarding happens none-the-less,

Where ST-Rbase is the same as LD-Rbase but Rbase has been
modified between ST and LD but forwarding happens none-the-
less,

Where ST-Rindex is the same as LD-Rindex but Rindex has been
modified between ST and LD but forwarding happens none-the-
less,

Could this be memory renaming?

https://www.researchgate.net/publication/2504540_Memory_Renaming_Fast_Early_and_Accurate_Processing_of_Memory_Communication
is an older article, Agner Fog wrote something about
something similar in "Mirroring memory operands" in https://agner.org/optimize/microarchitecture.pdf .

HTH (somewhat).
--
This USENET posting was made without artificial intelligence,
artificial impertinence, artificial arrogance, artificial stupidity,
artificial flavorings or artificial colorants.
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From Newsgroup: comp.arch

MitchAlsup wrote:

Does any one have {data on} or a pointer to {literature on} ST
to LD forwarding occurrences that isolate any of the following
patterns::

ST Rs,[Rbase+smallDisp]
...
LD Rl,[Rbase+smallDisp]

where Rbase is the 5-bit register specifier (not value), and:
ST-Rbase is the same as LD-Rbase AND (of course)
ST-smallDisp == LD-smallDISP,

Where ST-Rbase is different than LD-Rbase but forwarding
happens none-the-less,

Where ST-Rbase is the same as LD-Rbase, but Rbase has been
modified between ST and LD but forwarding happens none-the-
less,

ST Rs,[Rbase+Rindex<<scale+smallDisp]
...
LD Rl,[Rbase+Rindex<<scale+smallDisp]

Where ST-Rbase is the same as LD-Rbase but
St-Rindex is different than LD-Rindex but
forwarding happens none-the-less,

Where ST-Rbase is the same as LD-Rbase but Rbase has been
modified between ST and LD but forwarding happens none-the-
less,

Where ST-Rindex is the same as LD-Rindex but Rindex has been
modified between ST and LD but forwarding happens none-the-
less,

???

Thanks
Mitch

There are tons of papers on various aspects of store to load forwarding.

You appear to be interested in detecting not when the ST and LD address
are the same but whether registers have changed but give the same address.
Are you thinking of ST-LD elimination, where a push forwards to a pop
and the ST and LD to the stack memory can be eliminated?

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From Newsgroup: comp.arch


Thomas Koenig <tkoenig@netcologne.de> posted:

MitchAlsup <user5857@newsgrouper.org.invalid> schrieb:

Does any one have {data on} or a pointer to {literature on} ST
to LD forwarding occurrences that isolate any of the following
patterns::

ST Rs,[Rbase+smallDisp]
...
LD Rl,[Rbase+smallDisp]

where Rbase is the 5-bit register specifier (not value), and:
ST-Rbase is the same as LD-Rbase AND (of course)
ST-smallDisp == LD-smallDISP,

Where ST-Rbase is different than LD-Rbase but forwarding
happens none-the-less,

Where ST-Rbase is the same as LD-Rbase, but Rbase has been
modified between ST and LD but forwarding happens none-the-
less,

ST Rs,[Rbase+Rindex<<scale+smallDisp]
...
LD Rl,[Rbase+Rindex<<scale+smallDisp]

Where ST-Rbase is the same as LD-Rbase but
St-Rindex is different than LD-Rindex but
forwarding happens none-the-less,

Where ST-Rbase is the same as LD-Rbase but Rbase has been
modified between ST and LD but forwarding happens none-the-
less,

Where ST-Rindex is the same as LD-Rindex but Rindex has been
modified between ST and LD but forwarding happens none-the-
less,

Could this be memory renaming?

https://www.researchgate.net/publication/2504540_Memory_Renaming_Fast_Early_and_Accurate_Processing_of_Memory_Communication
is an older article, Agner Fog wrote something about
something similar in "Mirroring memory operands" in https://agner.org/optimize/microarchitecture.pdf .

Thanks for the references

HTH (somewhat).

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From Newsgroup: comp.arch


EricP <ThatWouldBeTelling@thevillage.com> posted:

MitchAlsup wrote:

Does any one have {data on} or a pointer to {literature on} ST
to LD forwarding occurrences that isolate any of the following
patterns::

ST Rs,[Rbase+smallDisp]
...
LD Rl,[Rbase+smallDisp]

where Rbase is the 5-bit register specifier (not value), and:
ST-Rbase is the same as LD-Rbase AND (of course)
ST-smallDisp == LD-smallDISP,

Where ST-Rbase is different than LD-Rbase but forwarding
happens none-the-less,

Where ST-Rbase is the same as LD-Rbase, but Rbase has been
modified between ST and LD but forwarding happens none-the-
less,

ST Rs,[Rbase+Rindex<<scale+smallDisp]
...
LD Rl,[Rbase+Rindex<<scale+smallDisp]

Where ST-Rbase is the same as LD-Rbase but
St-Rindex is different than LD-Rindex but
forwarding happens none-the-less,

Where ST-Rbase is the same as LD-Rbase but Rbase has been
modified between ST and LD but forwarding happens none-the-
less,

Where ST-Rindex is the same as LD-Rindex but Rindex has been
modified between ST and LD but forwarding happens none-the-
less,

???

Thanks
Mitch

There are tons of papers on various aspects of store to load forwarding.

You appear to be interested in detecting not when the ST and LD address
are the same but whether registers have changed but give the same address.

Yes, I want to do the ST-LD earlier than AGEN and/or use fewer
than 64-bits (the address) to do the compares.

I am also interested in the patterns presented to AGEN and which
ones tend to have ST-LD opportunities.

Are you thinking of ST-LD elimination, where a push forwards to a pop
and the ST and LD to the stack memory can be eliminated?

Not do much elimination, just getting a value to the LD faster
than waiting on ST data.

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From Newsgroup: comp.arch

Yes, I want to do the ST-LD earlier than AGEN and/or use fewer

I wonder how often that can be useful, i.e. how often the address takes
longer to compute than the data (when there is an ST to LD forwarding opportunity).


Stefan
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